Explanation/Annotation:Digital. Two 4-bit shift register. For measurement lip
ðîéñòâ, communication systems, computer engineering, other devices of îáðàáîò
SIF of digital information.
Detailed model description:The body 238. 16-1
significance of principal parameters are given in ÍÊÓ
the maximal low-level output voltage, in, not more 1. 0
the minimum high-level output voltage, in, no less than 9. 0
the high-level current input, mkA, not more 0. 3
the low-level input current, mkA, not more 0. 3
the low-level output current, mitotic activity, no less than 1. 3
the high-level output current, mitotic activity, no less than 1. 3
the consumption current, mkA, not more than 100 0
input capacitance, pension fund, not more 10. 0
signal delay in case of inclusion, ground station, not more 160. 0
signal delay in case of switching off, ground station, not more 160. 0 |
